JPH0451485Y2 - - Google Patents

Info

Publication number
JPH0451485Y2
JPH0451485Y2 JP1988063301U JP6330188U JPH0451485Y2 JP H0451485 Y2 JPH0451485 Y2 JP H0451485Y2 JP 1988063301 U JP1988063301 U JP 1988063301U JP 6330188 U JP6330188 U JP 6330188U JP H0451485 Y2 JPH0451485 Y2 JP H0451485Y2
Authority
JP
Japan
Prior art keywords
ceramic substrate
semiconductor
rounded
width
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1988063301U
Other languages
English (en)
Japanese (ja)
Other versions
JPH01167052U (en]
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988063301U priority Critical patent/JPH0451485Y2/ja
Publication of JPH01167052U publication Critical patent/JPH01167052U/ja
Application granted granted Critical
Publication of JPH0451485Y2 publication Critical patent/JPH0451485Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP1988063301U 1988-05-16 1988-05-16 Expired JPH0451485Y2 (en])

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988063301U JPH0451485Y2 (en]) 1988-05-16 1988-05-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988063301U JPH0451485Y2 (en]) 1988-05-16 1988-05-16

Publications (2)

Publication Number Publication Date
JPH01167052U JPH01167052U (en]) 1989-11-22
JPH0451485Y2 true JPH0451485Y2 (en]) 1992-12-03

Family

ID=31288809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988063301U Expired JPH0451485Y2 (en]) 1988-05-16 1988-05-16

Country Status (1)

Country Link
JP (1) JPH0451485Y2 (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0731549Y2 (ja) * 1988-11-11 1995-07-19 京セラ株式会社 半導体パッケージ用セラミック基板
JP5617574B2 (ja) * 2010-12-01 2014-11-05 株式会社村田製作所 セラミック多層基板

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572064A (en) * 1978-11-25 1980-05-30 Kyocera Corp Ceramic substrate
JPS5750062A (en) * 1980-09-09 1982-03-24 Toshiba Corp Magnetic disk controller

Also Published As

Publication number Publication date
JPH01167052U (en]) 1989-11-22

Similar Documents

Publication Publication Date Title
JPH0451485Y2 (en])
US4456641A (en) Ceramic substrate for semiconductor package
US5095360A (en) Ceramic chip-resistant chamfered integrated circuit package
US5160747A (en) Apparatus for manufacturing ceramic chip-resistant chamfered integrated circuit package
US4472333A (en) Ceramic substrate for semiconductor package and method of manufacture
JP2565303Y2 (ja) 半導体パッケージ用セラミック基板
JPH0731549Y2 (ja) 半導体パッケージ用セラミック基板
JPH06169850A (ja) 金属製真空二重容器及びその製造方法
JPS62197Y2 (en])
JPS5996751A (ja) 半導体装置
JP2517104Y2 (ja) 半導体パッケージ用セラミック基板
JPH0739232Y2 (ja) 電子部品素子封止用蓋材
JPH04133447U (ja) 半導体パツケージ
JPS638135Y2 (en])
JPS61177749A (ja) 半導体装置
JPS58218136A (ja) 半導体装置用ダイコレツト
JPS59124146A (ja) 硝子封止半導体装置の製造方法
JPH0126056Y2 (en])
JPS62261157A (ja) 半導体装置用パツケ−ジ
JPS63245945A (ja) 半導体パッケージ用セラミック基板
JP2519395Y2 (ja) 半導体パッケージ用セラミック基板
JPH0453156A (ja) セラミックパッケージ用板ガラス
JPS6278082A (ja) 半導体装置運搬具
JPS6218057A (ja) リ−ドフレ−ム加工方法
JPS60171281A (ja) グレ−ズドセラミツク基板